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Software Design/Verification Engineer with WCDMA/LTE Required competence: Long experience of TCP/IP Networks, UNIX, OSE Delta, Linux environments. Deep knowledge in OO design, Java, C, C++ Design in Agile/Scrum and ClearCase environment. Knowledge of RBS functions and protocols. Knowledge of GSM/CDMA/WCDMA/LTE . Candidates must be good team players with attention to detail, self-disciplined, able to manage their own time and workload, proactive and motivated. Candidates must have good written and verbal communication skills in English and Swedish (nice to have). Experience of test automation , writing test and functional specifications. Job Description: Software Design/Verification Engineer with WCDMA/LTE Working on a large project within a multi-standard environment , you will be able to work with the latest technologies, solutions and applications. The multi-standard RBS lab uses RAN and CN products for traffic and O&M. This assignment entails working closely together with System design, Verification and Test in cross-functional teams in order to... (more job details)Job Details:
Most technologically advanced video conferencing equipment available on the market today. The Telepresence Infrastructure team at Langley focuses on video conferencing network infrastructure utilising DSPs, FPGAs and multicore processors to provide the most powerful systems available. They design and develop the vast majority of their hardware and software in-house to obtain the performance and flexibility required. Working in a design centre of around 120 people the role will include both FPGA IP verification and integration, including in-house developed RTL and third party IP. The successful candidate will have the opportunity to own all aspects of verification through test plan specification, test-bench implementation, and diagnostics. There will also be the opportunity to extend experience into other Front End work such as emulation, RTL design, and deep-Embedded programming. Requirements:. Self-motivated. Good communications and able to work well in a team. C/C++ experience. Understanding of processor architectures. Debugging functional RTL and Gate level... (more job details)Job Details:
Verification/Development Engineer - Electromechanical projects - 12 month contract - Dorset Verification (Design Assurance) Engineer required by a market leading Aerospace and Defence organisation specialising in advanced systems for land, sea and air. The purpose of this role is to be responsible for leading and delivering verification activities on refuelling programmes, from formulating verification strategies to coordinating and delivering formal qualification tests and test reports. Responsibilities include: Generation of key verification documentation including verification matrices test procedures/qualification plans, test reports and design/analysis statements. Identification of, and establish activities required to support qualification Identification and management of qualification test hardware Management and conduct of qualification tests. Analysis and interpretation of data generated by tests Active participation in communication and reporting sessions. Co-ordination of support from/to other departments; design, performance, stress etc. Review of supplier qualification documentation against requirement specifications. Key to securing the above role is knowledge of verification and qualification... (more job details)
Posted:
11/05/2012 16:48:32
Reference:
JS-COBMS00197
Start Date:
ASAP
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Senior Digital Design Engineer - ASIC, DFT, STA - Contract - Netherlands A leading microelectronics consultancy is currently recruiting for an experienced digital design engineer with good knowledge of the digital Back End flow for an initial 6 month contract to be based in Netherlands You will join an experienced digital design team with a specialism in system power management and have the overall responsibility for block and top level ASIC design for power management products Responsibilities Block and top-level design from specification to synthesis and STA clean netlist Design of optimised digital blocks meeting functional, cost and low power constraints Develop TCL scripts and design constraints to perform synthesis, DFT insertion and STA Verification planning, feature extraction and verification test case developmnent Essential Experience Fluent in VHDL RTL coding and complete knowledge of ASIC design methodology Excellent knowledge of developing design constraints and synthesis scripts (Synopsys) Proficiency in developing... (more job details)
Location:
Type:
Permanent
Salary/Rate:
25,000 and £40,000 Dependent on experience Dependant on experience
Job Details:
Our client a leading provider of sub-sea solutions requires a Mechanical Design Engineer for their Motherwell office. The successful individual will benefit from a highly competitive basic salary of between £25,000 and £40,000 Dependent on experience. To apply for this role the ideal individual should either be currently employed in a similar design role within the Oil & Gas industry or be working in design in another heavy engineering role and be interested in pursuing a exciting new role within the oil and gas industry. To be considered for this role you must meet most of the following criteria: Be educated to degree level in Mechanical Engineering or other relevant discipline. Have experience of producing relevant reports Have knowledge of and experience in relevant industry codes and standards Be able to produce all relevant engineering calculations Have a good knowledge of a relevant 2D/3D software package Key responsibilities include: Production... (more job details)
Posted:
15/05/2012 16:33:25
Reference:
JSKRMDE1
Start Date:
Negotiable
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Levels:
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Our client is a hugely popular computer components company seeking an Engineer to design and develop a GPIO driver for an IOSF OVM agent to simulate HVM test patterns for chips. OVERVIEW: Learn IOSF OVM agent and GPIO protocol. Write SystemVerilog code to implement GPIO bus driver. Integrate driver into agent. Test that driver performs correctly. Write a user guide. REQUIREMENTS: 5+ years verification engineering with some OVM experience SKILLS: Design, development, verification, SystemVerilog, OVM NICE TO HAVE: GPIO, High Volume Manufacturing test, On-chip System Fabric Estimated length of assignment: 13 weeks Number of positions: 1 Estimated hours per week: 40 hours (standard hours: 8:00AM - 5:00PM) Overtime: No % of travel required: 0 Telecommuting: No To apply for this position please attach an updated Resume in Word/.doc format with daytime phone number where you can best be reached. Please also include a brief cover letter outlining your experience as... (more job details)Job Details:
Proteus Europe operating as an employment business, is currently seeking a Analog Verification Engineer. One of our clients in Germany is currently looking for an Experienced verification engineer (Analog) who will be able to join their existing team. The team is developing Analog IC systems and we need an experienced engineer who will be able to do verification tests and also assist with analysis on improvements with the design team if any flaws are found. This is a long term role which will extend on a quarterly basis with budgetary extensions. Please chat with me for more details on the client.Job Details:
About Us With its unique focus and expertise in system power management, Dialog Semiconductor brings decades of experience to the rapid development of energy-efficient, highly integrated, mixed-signal integrated circuits, optimized for personal mobile and automotive applications. We provide flexible and dynamic support and world-class innovation, and offer our clients the reassurance of dealing with a globally-established business partner. Job Description Support development of complex mixed signal IC for power management and automotive applications Support product from specification phase to production ramp Develop new techniques and capabilities within Dialog to improve of Dialog's IP portfolio in the field of power management and automotive Duties & Responsibilities Support specification and design of complex analogue circuits within high performance ICs Verification of analog circuits and chip level architectures Organize work to ensure that project timescales and design targets are met Provide technical support for a product from its conception through to production Work... (more job details)
Posted:
14/05/2012 16:55:29
Reference:
JS/DIALOG-GERMANY-ANALOG
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SENIOR DIGITAL DESIGNER ENGINEER My client is a world renown organisation looking for a senior digital design engineer. The successful candidate should have strong experience in Architect and design of digital circuits and systems for CMOS image sensors, collaborates well within team environments, locally and internationally, perform top level design verification, work with physical implementation teams and understand methodically and practically Debug functionality. The client is looking to pay a very strong salary for the successful candidate who will lead the design and development. Desired Skills Set: CMOS/RTL Design Experience/Verilog/VHDL Interviews to take place next week. Please contact Hugo directly. ITHR is acting as an Employment Business in relation to this vacancy. ITHR is an Equal Opportunities employer; we welcome applicants from all backgrounds.
Posted:
15/05/2012 18:47:11
Reference:
JS-HUDE/SDDE
Start Date:
ASAP
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Location:
Type:
Permanent
Salary/Rate:
£40k to £50k per annum + Benefits: £Competitive
Job Details:
ASIC/FPGA/RTL Design Engineer - Cambridge An outstanding opportunity has arisen for a talented Front End design engineer needed for a world leading company working in the semiconductor sector. You will be working as part of a world class engineering team working on the latest CPU designs and development projects. This is a demanding hands-on role, employing the latest design and verification techniques to develop best-in-class hardware designs. Successful candidates will display a high degree of technical creativity, and good experience in RTL implementation, including hands-on experience using state of the art tools and techniques in complex IP development projects. You will also need some of the following experience: - CPU hardware design and implementation experience. - Proven ability to design, specify, implement and verify complex IP designs. - Experience of VHDL/Verilog. - A high level of pro-activity, initiative and problem solving. This is a fantastic opportunity to take the next... (more job details)
Posted:
11/05/2012 17:29:32
Reference:
JSCAM//780
Start Date:
ASAP
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Levels:
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Job Details:
A growing nationwide company is looking for a Sr. ASIC/Digital Design Engineer as soon as possible! We are looking for candidates within the state of Arizona willing to relocate to the Phoenix, Arizona Metropolitan area. Once again, the position is in Phoenix, Arizona area. We are looking for candidates that have a proven track record of Digital IC Design working with Analog IC Design Engineers. This Engineer will work with other Design Engineers and meet the company's objectives. The Sr. Design Engineer is needed to design and implement digital functions within mixed signal ASICs for Power Management ICs. Initial tasks are to be Real Time Clocks, I2C Interface and Register Map, and CODEC integration. This is a Full time position with solid equity opportunity! We are working directly with the Hiring Manager. Senior ASIC Design Engineer Qualifications Include: 5-10+ years of experience in Digital Design with at least 5+ years... (more job details)Job Details:
The SPX Corporation is a Fortune 500, multi-industry manufacturing leader with 17.000 employees all over the world. SPX's Flow Technology segment designs, manufactures and markets engineered solutions and products used to process, blend, and meter and transport fluids. We also offer equipment for air and gas filtration and dehydration. Our leading brands have global operations which service the food & beverage, power and energy and industrial markets. For our location in Kolding, Denmark we are currently looking for a Senior Mechanical Design Engineer Hybrid Heat Exchangers (English and Danish speaking) GENERAL SUMMARY about the position The position is responsible for creating customized product designs from sketches, marked up prints, verbal or written instructions and/or customer requirements. The Hybrid Design Engineer will provide engineering services required to support Project Managers, sales orders, quotations, design accuracy, and working close with manufacturing department to meet deadlines and to track quality and process. Limited... (more job details)Job Details:
A growing engineering company in the Phoenix, Arizona area is looking for a Senior Analog Mixed Signal PLL Design Engineer. We are looking for candidates nationwide willing to relocate to the Phoenix, AZ area. The Senior Analog/Mixed-Signal IC design engineer will provide key contributions to state of the art PLLs for use in high performance networking and communications products. This position will have involvement in product definition, design, simulation, layout, lab verification, and release to production. Specific Qualifications (items are required unless otherwise noted): MSEE or Ph.D. with 3 years of professional IC design experience with strong emphasis on analog and digital PLL designs and architectures Key areas of interest include: low phase noise integer and fractional-N PLLs, digital PLLs, delta-sigma converters, VCOs, bias drivers, regulators, and I/Os A solid track record in CMOS IC design is required Proficiency in simulating circuit and system noise analysis with MATLAB or a... (more job details)Job Details:
A growing nationwide company with an office in San Diego, California is looking for a Senior ASIC/Digital Design Engineer (PMIC) as soon as possible. They are looking for candidates nationwide willing to relocate to the San Diego, CA area. Once again, the position is in the San Diego, CA area. Candidates should have a proven track record of Digital IC Design working with Analog IC Design Engineers and other Digital IC Design Engineers. This is a full time position with solid equity opportunity. Responsibilities: Work with other Design Engineers and meet the company's objectives Design and implement digital functions within mixed signal ASICs for Power Management ICs Do front to back (RTL, synthesis, verification, mixed mode simulation with the analog functions, and test support) in power management PMICs Initial tasking is to be Real Time Clocks, I2C Interface and Register Map, and CODEC integration For consideration, please send your Resume... (more job details)Job Details:
Design Engineer - CATIA v5 - Dorset - 12 Month+ Contract My client are looking for a Design Engineer with knowledge of CATIA v5. The ideal candidate will have Aerospace experience. The client are willing to offer a 12 Month contract with extensions likely. Key Skills CATIA v5 Desirable Skills Aerospace Experience Interviews are taking place this week. The client will be willing to wait up to 2 weeks for the right candidate.
Posted:
17/05/2012 12:23:58
Reference:
JSDOR
Start Date:
ASAP - Willing to wait up to 4 weeks
Sectors:
Levels:
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Job Details:
Design Engineer - IRSE Licenced Engineer - Devon - 16 months plus contract Your main responsibility will be to produce accurate designs of a failsafe nature within the Projects Engineering department within the timescales laid down; Your role will include: Providing engineering solutions to customer design specifications; Actively support the department head in the pursuance of standardisation and the reduction of throughput time where possible; Interfacing with clients and production departments; Assist with the development in tenders and workplace opportunities both in the UK and overseas. The Candidate: You will have previous experience in a design engineer role within railway signalling and hold an IRSE Design Licence. You will have knowledge and experience in the use of AutoCAD and Bentley Microstation CAD packages and hold an ONC/HNC in Electrical Engineering or equivalent. Regards.Job Details:
Design Engineer - £28K - £35K - Coventry Solid Engineering background with 3 years+ experience in a related industrial sector. Design of process equipment or similar. Experience of AutoCad Inventor 3D design package Ability to work with Production Management The Candidate: Solid Engineering background with 3 years+ experience in a related industrial sector. Design of process equipment or similar. Experience of AutoCad Inventor 3D design package Ability to work with Production Management ABILITIES: Attention to detail Logical Methodical Computer literate Ability to work to deadlines Able to use own initiative Creative Overseas work to include sign off of equipment (as and when required) Required to work weekends (usually Saturday) in busy periods Calm - able to work under pressure Confident/assertive/determined Willing to take on responsibility Team player - working in an open plan office Flexible Committed/conscientious Qualifications: Academic Qualifications - Good standard of education Professional Qualifications - HNC/D (min) Mechanical... (more job details)
Posted:
16/05/2012 12:38:16
Reference:
JSNNLTD 720
Start Date:
Urgent
Levels:
Quick Code:
Job Details:
Design Engineer - Engineering, Automotive, CATIA V5, Design, Mechanical JOB TITLE:- Design Engineer - £28 - £30 per hour - Midlands ROLE: Contract - 6 - 12 Months LOCATION: Midlands RATE: £28 - £31 per hour INDUSTRY: Engineering, Automotive, CATIA V5, Design, Mechanical Design Engineer - Engineering, Automotive, CATIA V5, Design, Mechanical THE ROLE My client, a leading engineering consultancy is looking for a chassis design engineer to join its team due to an increased and ongoing workload. A contract role initially for 6 - 12 months, the design engineer will be responsible for carrying out CAD design work for a new braking systems. The role will involve looking at designs, component and elements delivering design to support the vehicle program CANDIDATE EXPERIENCE The successful applicant will have a full working knowledge of CATIA V5 and have experience of concept and feasibility studies for chassis, suspension, steering and body systems.... (more job details)
Posted:
16/05/2012 11:05:25
Reference:
JS-J251010A00162256
Start Date:
ASAP
Sectors:
Levels:
Quick Code:
Location:
Type:
Permanent
Salary/Rate:
£40k to £60k per annum + Benefits: Competitive package
Job Details:
Verification engineer - Senior & Principal - Cambridge An exciting world leader has both senior and principal positions open for an experienced and enthusiastic verification engineer. Working as a verification engineer, you will have the opportunity to lead the definition of verification strategies and you will also make a substantial contribution to the ASIC verification strategy that will be implemented. In addition, you will have the opportunity to take the lead responsibility over various, challenging projects. The ideal candidate will have the following: -Hands-on verification experience with other verification techniques/methodologies such as directed testing, formal property checking, FPGA/Emulation flows and device bring up -Familiarity with RISC microprocessors and Microprocessor systems -Experience of Verilog -Perl, python or other Scripting language In return, you will receive a competitive salary and a competitive bonus and reward package. Key words: Senior/Principal/Verification/Engineer/Verilog/ASIC/FPGA/Cambridge.
Posted:
15/05/2012 17:37:22
Reference:
JS3478
Start Date:
2012-05-15
Disciplines:
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Design Engineer - CATIA v4 - Surrey - 6 Month+ Contract My client are looking for a Design Engineer with CATIA v4 experience. Automotive or Aerospace experience is a bonus. The client are willing to offer a 6 Month contract with extensions likely. Key Skills CATIA v4 Desirable Skills Aerospace/Automotive Experience Interviews are taking place this week. The client will be willing to wait up to 2 weeks for the right candidate. Location - Surrey Rate - Good Contract - 6 months + If interested please send an up to date C.V. Also if you have any friends or colleagues who you think might be suitable please feel free to pass them this requirement.
Posted:
11/05/2012 08:14:58
Reference:
JSV4
Start Date:
ASAP - Willing to wait
Sectors:
Levels:
Quick Code:
 

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